) logic of RAM and EPROM chips using decoders (e.g., 74LS138). :
: Second highest. Maskable, edge-triggered. Vectored to 003CH . RST 6.5 : Maskable, level-triggered. Vectored to 0034H . RST 5.5 : Maskable, level-triggered. Vectored to 002CH . microprocessor 8085 ppt by gaonkar new
The processor uses an independent address space specifically reserved for peripherals ( distinct input and ) logic of RAM and EPROM chips using decoders (e